Assistant Professor of Electrical & Computer Engineering at Western New England University. Research in FPGA acceleration, high-performance computing, and embedded systems. Teaching through hands-on, project-based learning.
An Assistant Professor and engineering researcher with expertise in high-performance computing, reconfigurable platforms (FPGAs), parallel programming languages, and embedded systems. Experienced in hands-on undergraduate and graduate instruction, curriculum design, active learning paradigms, and project-based engineering pedagogy.
Teaching Microprocessors (CPE 310/360), Intro to Engineering (ENGR 103), Computer Programming (ENGR 105), Data Acquisition & Processing (ENGR 110), and VLSI Design (CPE 491/591/691). First-Year Advisor and senior capstone advisor.
High-performance computing applications on cloud and edge FPGAs.
Computer Architecture, Heterogeneous Computing, and C++ Logic Design, for undergraduate and graduate students.
Undergraduate instruction in electrical and electronics engineering.
Industrial instrumentation and control systems.
Ph.D. Electrical & Computer Engineering (UNCC, 2021); M.Tech. Microelectronics & VLSI (NIT Agartala, 2013); B.E. Electrical Engineering (Tripura University, 2011).
Senior capstone and independent research projects advised in FPGA acceleration, embedded systems, and controls — several resulting in peer-reviewed publications and design-competition awards. Click a project for more detail.
First-year teams acted as R&D engineers for "ResQTech Solutions," designing robots on the course's Raspberry Pi Pico 2 W platform to rescue survivors from a simulated volcanic disaster zone.
🏆 First Place, Botbash 2025
Mission 1 used remote-controlled robots: one or two "Bridger" bots crossed a speed bump and placed a team-built bridge over a lava-filled notch, then a "Rover" bot crossed the bridge, retrieved the stranded individual, and returned to start. Points rewarded each obstacle cleared and speed, within a 4-minute limit.
Mission 2, "Operation Lava Run," removed the remote: an autonomous AutoBot had to carry the rescued survivors through a maze-like canyon using only sensors and code, stop in the field-hospital zone, and signal arrival with an LED. The challenges build programming, hardware integration, teamwork, and iterative design in the first semester of engineering.
Advised the controls and Engine Control Unit (ECU) architecture for a cross-departmental capstone with Mechanical Engineering and industry partner Pratt & Whitney, building a Full Authority Digital Engine Control system for a jet engine test stand.
🏆 First Prize, Best Senior Design Project in ECE
The ECU is built around a Raspberry Pi Zero 2 W payload computer running a custom-built embedded Linux image, paired with a purpose-designed ECU shield and a curved inlet PCB shaped to fit inside the engine housing. Closed-loop PID control laws regulate the engine using feedback from RPM, thermocouple, and pressure sensing hardware, following the same FADEC (Full Authority Digital Engine Control) architecture used in full-scale jet engines.
Mechanical Engineering students built and instrumented the physical test stand; Pratt & Whitney engineers provided industry review of the control approach. The finished system was presented at WNE's Capstone Design Day, where it won first prize for Best Senior Design Project in the ECE department (May 2026).
Built a reusable, hardware-friendly experimentation platform for speculative backpropagation on FPGA targets, benchmarking training-time overhead and accuracy across input dimensions. Presented at MWSCAS 2026.
The framework unifies compute and orchestration logic for speculative backpropagation into a single, reusable pipeline: configuration input, preprocessing, dataset handling, model build, and training-mode selection, with per-model benchmarking of loss, accuracy, runtime, and speculative/fallback update counts. It was validated against a driver-drowsiness-detection (DDD) image classification task across input sizes from 24×24 up to 227×227.
The headline finding was a negative result reported honestly: speculative backpropagation introduced more orchestration overhead than useful compute savings at the tested scale, underperforming standard stochastic gradient descent as workload complexity grew. That result, and the reusable benchmarking platform behind it, were presented at the 69th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2026).
A joint project with Rice University parallelizing the forward pass, backward pass, and weight-update stages of neural network training on an Octavo Systems FPGA board, achieving a 15% execution-time improvement over baseline. Published at IEEE MWSCAS 2025.
The project explored circular activation structures, batching, and stronger weight-initialization functions to parallelize each stage of neural network training on the OSDZU3-REF board from Octavo Systems, a GIM (Ghost-In-Machine) platform developed in collaboration with Rice University's Ray Simar.
Accuracy stayed within a reasonable range of the uncompressed baseline across all tested thresholds, while execution time improved by roughly 15% over baseline — the two students' work was published together at the 68th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2025).
A battery-powered intrusion detector that senses a car door opening through cabin air-pressure change, sounds an alarm, and reports the vehicle's real-time GPS location.
Built on an Adafruit HUZZAH32 (ESP32) with a BMP280 barometric pressure sensor, an Ultimate GPS FeatherWing, and a piezo buzzer, programmed in the Arduino IDE. A pressure change triggers the alarm and starts GPS tracking; the decoded GPS coordinates proved highly accurate.
The system delivered real-time alerts on battery power. Planned next steps were a smartphone app for monitoring and tracking, and an owner-disable feature.
A Home Assistant–based desk prototype that sets the mood of a tabletop game on command, controlling lights and sound from a single embedded processor.
The system ran Home Assistant with publish/subscribe messaging over an MQTT broker, plus custom Python libraries of lighting and sound effects. It drove GPIO outputs on BeagleBone and Raspberry Pi hardware and controlled Bluetooth smart bulbs, with phone notifications and several generations of custom user interfaces.
Future work included voice-assistant integration and a purpose-built desk housing all devices.
An active member of the Kern Entrepreneurial Engineering Network (KEEN): participant, presenter, and now workshop leader and mentor for new faculty.
KEEN is a national partnership of engineering schools, supported by the Kern Family Foundation, that promotes an entrepreneurial mindset: curiosity, connections, and creating value.
Redesigned CPE 360 around the ATmega328PB, ENGR 103 around Arduino and the Raspberry Pi Pico 2 W, and built ENGR 110 with an AI-enhanced product-design module.
Co-PI on a Davis Educational Foundation study of active learning in quantitative courses, applied in ENGR 105, and co-facilitated a campus teaching workshop.
Created the WNE Breadboard Simulator for first-year engineering students.
Journal articles and peer-reviewed conference papers, most recent first.
C. Burnham, A. A. Purkayastha, N. Magotra, "Speculative Backpropagation AI Training Framework for FPGA-Oriented Implementation at the IoT Edge," 69th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2026). Accepted & presented.
J. Tharwani, S. Aggarwal, A. A. Purkayastha, "Quantifying Virtualization Overhead for CPU-Intensive HPC Workloads in Hypervisors: A Comparative Study of KVM, Proxmox VE, Xen, and Hyper-V," Proc. IEEE SoutheastCon 2026.
A. A. Purkayastha, S. Aggarwal, J. Tharwani, "Heuristic-Driven Resource Optimization for Decoupled Memory Channels on FPGAs," Proc. 2026 IEEE IATMSI, vol. 4, pp. 1–6.
S. Aggarwal, A. A. Purkayastha, J. Tharwani, "Empowering IoT with Federated Learning: A Cross-Domain Survey from Healthcare to Industry," Proc. 2026 IEEE IATMSI, vol. 4, pp. 1–5.
A. A. Purkayastha, J. Tharwani, S. Aggarwal, "Ant Colony Optimization for CMOS Physical Design: Reducing Layout Area and Improving Aspect Ratio in VLSI Circuits," Electronics, 2025.
A. A. Purkayastha, J. Tharwani, S. Aggarwal, "FPGA or GPU? Analyzing Comparative Research for Application-Specific Guidance," IEEE SoutheastCon 2025, Concord, NC.
J. Tharwani, S. Aggarwal, A. A. Purkayastha, "Evaluating HPC-Style CPU Performance and Cost in Virtualized Cloud Infrastructures," IEEE SoutheastCon 2025, Concord, NC.
S. Centeno, C. Sprague, A. A. Purkayastha, R. Simar, N. Magotra, "Exploring Parallelism in FPGA-Based Accelerators for Machine Learning Applications," 68th IEEE MWSCAS 2025.
J. Tharwani, A. Purkayastha, "Cost-Performance Evaluation of General Compute Instances: AWS, Azure, GCP, and OCI," International Journal of Computer Trends and Technology, vol. 72, no. 11, pp. 248–255, 2024.
J. Ekong, A. Purkayastha, G. Ekong, "Work in Progress: Impact of Collaborative Learning Strategies on Anxiety Reduction in Introductory Programming Courses," ASEE 2024.
S. Centeno, A. Purkayastha, "Beyond Trial and Error: Automating Delay Generation in Assembly with Algorithmically Calculated For-Loops," Global Interdisciplinary Green Cities Conference 2024.
D. Pazho, G. A. Noghre, A. A. Purkayastha, J. Vempati, O. Martin, H. Tabkhi, "A Survey of Graph-based Deep Learning for Anomaly Detection in Distributed Systems," IEEE Transactions on Knowledge and Data Engineering, 2023.
S. Aggarwal, A. A. Purkayastha, "SecureTrack — A Contact Tracing IoT Platform for Monitoring Infectious Diseases," Global Interdisciplinary Green Cities Conference 2023.
"VLSI Design," Tech-Neo Publications, ISBN 978-93-90376-04-9, 2020.
"Design Study on Impact of Memory Access Parallelism for Cloud FPGAs," 34th International System-on-Chip Conference (IEEE SOCC 2021).
"LLVM-based Automation of Memory Decoupling for OpenCL Applications on FPGAs," Elsevier MICPRO, Special Issue on Reconfigurable Computing, 2020.
Design days, competitions, and outreach with students at Western New England University. Click a photo to enlarge it.
Open to research collaboration, speaking engagements, and prospective graduate/undergraduate researchers.
